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Accuracy and Resiliency of Analog Compute-in-Memory Inference Engines

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Document pages: 21 pages

Abstract: Recently, analog compute-in-memory (CIM) architectures based on emerginganalog non-volatile memory (NVM) technologies have been explored for deepneural networks (DNN) to improve energy efficiency. Such architectures,however, leverage charge conservation, an operation with infinite resolution,and thus are susceptible to errors. The computations in DNN realized by analogNVM thus have high uncertainty due to the device stochasticity. Several reportshave demonstrated the use of analog NVM for CIM in a limited scale. It isunclear whether the uncertainties in computations will prohibit large-scaleDNNs. To explore this critical issue of scalability, this paper first presentsa simulation framework to evaluate the feasibility of large-scale DNNs based onCIM architecture and analog NVM. Simulation results show that DNNs trained forhigh-precision digital computing engines are not resilient against theuncertainty of the analog NVM devices. To avoid such catastrophic failures,this paper introduces the analog floating-point representation for the DNN, andthe Hessian-Aware Stochastic Gradient Descent (HA-SGD) training algorithm toenhance the inference accuracy of trained DNNs. As a result of suchenhancements, DNNs such as Wide ResNets for the CIFAR-100 image recognitionproblem are demonstrated to have significant performance improvements inaccuracy without adding cost to the inference hardware.

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