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Quantum Fan-out Circuit Optimizations and Technology Modeling

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Document pages: 14 pages

Abstract: Instruction scheduling is a key compiler optimization in quantum computing,just as it is for classical computing. Current schedulers optimize for dataparallelism by allowing simultaneous execution of instructions, as long astheir qubits do not overlap. However, on many quantum hardware platforms,instructions on overlapping qubits can be executed simultaneously through global interactions . For example, while fan-out in traditional quantumcircuits can only be implemented sequentially when viewed at the logical level,global interactions at the physical level allow fan-out to be achieved in onestep. We leverage this simultaneous fan-out primitive to optimize circuitsynthesis for NISQ (Noisy Intermediate-Scale Quantum) workloads. In addition,we introduce novel quantum memory architectures based on fan-out.Our work also addresses hardware implementation of the fan-out primitive. Weperform realistic simulations for trapped ion quantum computers. We alsodemonstrate experimental proof-of-concept of fan-out with superconductingqubits. We perform depth (runtime) and fidelity estimation for NISQ applicationcircuits and quantum memory architectures under realistic noise models. Oursimulations indicate promising results with an asymptotic advantage in runtime,as well as 7--24 reduction in error.

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